MOS Device Physics


The objective of this article is to develop a circuit model for the MOSFET (Metal-Oxide Semiconductor Field Effect Transistor) by formulating its operation. We discuss the structure of MOS transistor and derive the IV characteristics. Next, we disucss the second-order effects such as body effect, channel-length modulation, and subthreshold conduction. Following this, we identify the parasitic capacitances of MOSFET, derive the small-signal model, and present the SPICE model.

MOSFET as a Switch

Shown in figure 1 is the symbol of an n-type MOSFET and a p-type MOSFET. It has 3 terminals: Gate (G), Source (S) and Drain (D). The latter two are interchangable because the device is symmetric. The arrow indicates the direction of current flow. When the MOSFET is operating as a switch, the transistor "connects" or "disconnects" the Source to the Drain depending on the gate voltage ($V_{G}$).

MOS Symbol
Figure 1: Simple View of MOS transistor.
To aid circuit design, we need to look into the structure and the physics of the transistor. Questions like, For what value of $V_{G}$ does the device "turn on"; in other words, what is the "threshold voltage"? What is the resistance between S and D when the transistor is on (or off)? How does this resistance depend on the terminal voltages? Can we always model this resistance as a simple linear resistor? What limits the speed of the transistor? etc.

MOSFET Structure

Shown in figure 2 is the structure of an NMOS device. It is fabricated in p-substrate. Source and Drain are heavily doped n regions ($n^{+}$). A heavily doped (conductive) piece of polysilicon (or Metal) is used for the gate terminal. A very thin ($t_{ox}$) layer of insulating silicon dioxide ($SiO_{2}$) is sandwiched between the gate and the substrate. The useful action of the device occurs in the substrate region under the gate oxide, called "intrinsic part".
MOS Device is symmetric. Still, one terminal is called Source and the other is called Drain. This is because Source is the terminal that provides the charge carriers (electrons in case of NMOS device and holes in case of PMOS device), and Drain the terminal that collects them.
We have introducted S, D and G terminals, but in reality MOSFET is a four-terminal device. The fourth terminal is the bulk or the body terminal. In typical MOS operation, the S/D junctions must be reverse-biased, so for most cases, in NMOS (PMOS) the body is connected to the most negative (positive) supply. The physical connection to the body on the device is done through an ohmic $p^{+}$ region (Figure 2).
MOS Structure
Figure 2: Structure of a MOS Device.
In practice, both PMOS and NMOS are placed in a local substrate, called a "well". Today, PMOS is fabricated in $n-$well and this $n-$well is connected to the most positive supply in the system so that the PMOS remains reverse-biased under all conditions (Figure 2, bottom-right).

MOSFET Symbols

MOSFET circuit symbols are shown in figure 3. Note that the Source of PMOS device is positioned at the top here to indicate that it has higher potential than its Gate. Since in most circuits, the bulk terminals of the NMOS and PMOS are tied to Ground and $V_{DD}$, respectively, we often omit these in circuit drawings. (a) and (b) are commonly used in Analog design whereas (c) often occurs in Digital designs.

MOS Symbol
Figure 3: MOSFET Symbols.

MOS I/V characteristics

Credits:
Large parts of the article is derived from B. Razavi's "Design of analog CMOS integrated circuits" book [razavi2017cmos].

References